re-do routing for lcd yet again

cuz im an idiot and thought that i could use via-in-pad

i cant

its $300 more if i do that

so. pretty much all the connections on the mcu are gonna have to be on the top layer

which will be. *fun*...
This commit is contained in:
kit 2026-04-14 14:59:19 -04:00
parent a1909a0893
commit 6f4e700e66
3 changed files with 875 additions and 6016 deletions

File diff suppressed because it is too large Load diff

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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 4,
"active_layer_preset": "",
"auto_track_width": false,
"hidden_netclasses": [],

View file

@ -135,10 +135,10 @@
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.15,
"min_through_hole_diameter": 0.2,
"min_track_width": 0.0762,
"min_via_annular_width": 0.2,
"min_via_diameter": 0.35,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.4,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
@ -226,8 +226,16 @@
"drill": 0.0
},
{
"diameter": 0.35,
"drill": 0.25
"diameter": 0.4,
"drill": 0.3
},
{
"diameter": 0.45,
"drill": 0.2
},
{
"diameter": 0.45,
"drill": 0.3
},
{
"diameter": 1.1,
@ -496,8 +504,8 @@
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.0889,
"via_diameter": 0.35,
"via_drill": 0.25,
"via_diameter": 0.45,
"via_drill": 0.3,
"wire_width": 6
}
],